Iterative decoding Formal Verification Classification Safety Disaster management Model driven engineering Virtual prototyping Design Space Exploration Propagation URSI HW Accelerators Design Requirements analysis Field programmable gate arrays DIPLODOCUS Risk management ProVerif HW/SW partitioning Formal verification Model checking Coprocessors Analysis Analog/Mixed Signal Design SDR Hardware Application specific integrated circuits Autonomy UAV UML Integration LDPC codes Heterogeneous models Communications Model Driven Engineering Design space exploration System-level design Hardware/software co-design Modelling Verification Model-driven engineering Cognitive Radio Timing analysis UML/SysML Remote sensing Model-based engineering Model Checking GPR Hardware Architecture Computer architecture Code generation Costs Simulation Baseband Processing Hardware/software partitioning Android Immersion Cryptography Interactive Autonomous navigation Risk assessment Dependency Graph FPGA Differential power analysis DPA Formal methods TTool Exploration d'architecture SysML Embedded systems Autonomous systems Open Platforms for Multistandard Support SysML-Sec Image processing CPS Ingénierie des modèles MDE Signal processing 3D perception Virtual Prototyping Formal Methods Performance Modeling Requirements MBSE Security Reliable systems Automata System-on-Chip Malware Models Behavior Execution Trace Analysis Drone Model-checking Modélisation Drones Embedded Systems Autonomous vehicles Attacks Multi-View Design Architecture